1. Field of the Invention
The invention relates in general to a spread spectrum clock signal generator (SSCG) for spreading a clock signal to reduce the electronic magnetic interference (EMI) of an electronic system.
2. Description of the Related Art
In an electronic system, when the EMI problem is encountered, the clock signal may be spread to reduce the EMI. When the frequency of the input clock signal is changed with time, the clock signal may be spread.
At present, most spectrum spreading techniques are achieved using a phase locked loop (PLL). FIG. 1 (Prior Art) is a block diagram showing a conventional phase locked loop (PLL) 100. Referring to FIG. 1, the PLL 100 includes a phase frequency detector (PFD) 110, a charge pump (CP) 120, a filter 130, a voltage controlled oscillator (VCO) 140 and a frequency divider 150.
The PHD 110 compares an input clock signal IN with an output signal of the frequency divider 150 and thus generates control signals UP or DN. The charge pump 120 controls a voltage V to rise or fall according to the control signals UP or DN. The waveform of the voltage V is also shown in FIG. 1. The filter 130 filters the noise of the voltage V. The VCO 140 generates an output clock signal OUT according to the voltage V.
However, the PLL has the drawbacks of the high circuit complexity and the high circuit cost. So, there is a need to provide a spread spectrum clock signal generator capable of effectively spreading the clock signal and thus reducing the EMI problem, wherein the circuit complexity of the generator is not high and the circuit cost thereof is low.